Differential amplifiers are often used in high performance analog and mixed-signal integrated circuits, as part of a buffer or gain block. In their most typical uses, differential amplifiers exhibit structural symmetry that allows the amplifier to provide good rejection to common mode and power supply noise. An output of a differential amplifier is a measure of the difference between a pair of input signals, so that if the differential amplifier is made of matched transistor devices (e.g., ones that are structural replicates of each other and, accordingly, exhibit very similar DC and AC electrical characteristics), then common mode noise occurring at the inputs of the amplifier or the power supply is significantly reduced at its output.
A differential amplifier uses a differential transistor pair whose transistors are typically matched. However, due to random variations in the manufacturing process, some unintended mismatch may still exist in the manufactured parts. This type of mismatch contributes to an “offset” during operation of the amplifier. In other words, if the input signals to the differential amplifier were at equal levels, an output of the amplifier ideally should be zero (being a measure of the difference between equal input levels). However, in practice, the output exhibits an appreciable, non-zero level referred to as output offset. The offset becomes greater when the differential amplifier design is realized using manufacturing processes that exhibit smaller transistor feature sizes or process geometry. In particular, it has been found that the offset is roughly inversely proportional to the square root of the area of the transistor devices that are used in the differential pair.
Offset correction is becoming increasingly important in high speed circuits that use differential amplifiers, e.g. data communications receivers that operate at symbol rates of 1 GHz and higher. An example is a receiver used in a high speed I/O channel such as a Common System-level Interface (CSI) by Intel Corp. of Santa Clara, Calif. In that technology, transistor devices with relatively short channel lengths, e.g. well below 100 nanometers, are used to achieve fast operation. A differential amplifier using such short channel devices also calls for an offset correction circuit, to alleviate the offset.
An existing method of offset correction adds an offset differential pair, to the input differential pair of the amplifier. The offset differential pair is coupled in parallel with the input pair, that is, a pair of its output terminals share common nodes with a pair of the output terminals of the input pair. The offset correction circuit includes additional circuitry such as a digital to analog converter that generates a differential offset signal that is applied to the offset pair in an amount that is expected to reduce the offset of the amplifier.